diff -urNp mcelog-d2e13bf0.orig/mcelog.c mcelog-d2e13bf0/mcelog.c
--- mcelog-d2e13bf0.orig/mcelog.c	2018-06-28 11:53:15.907862669 -0400
+++ mcelog-d2e13bf0/mcelog.c	2018-06-28 11:54:56.247852219 -0400
@@ -446,6 +446,9 @@ static void dump_mce(struct mce *m, unsi
 	if (recordlen >= offsetof(struct mce, ppin) && m->ppin)
 		n += Wprintf("PPIN %llx\n", m->ppin);
 
+	if (recordlen > offsetof(struct mce, microcode) && m->microcode)
+		n += Wprintf("MICROCODE %x\n", m->microcode);
+
 	if (recordlen >= offsetof(struct mce, cpuid) && m->cpuid) {
 		u32 fam, mod;
 		parse_cpuid(m->cpuid, &fam, &mod);
diff -urNp mcelog-d2e13bf0.orig/mcelog.h mcelog-d2e13bf0/mcelog.h
--- mcelog-d2e13bf0.orig/mcelog.h	2018-06-28 11:53:15.908862699 -0400
+++ mcelog-d2e13bf0/mcelog.h	2018-06-28 11:54:04.754318009 -0400
@@ -34,6 +34,7 @@ struct mce {
 	__u64 synd;	/* MCA_SYND MSR: only valid on SMCA systems */
 	__u64 ipid;	/* MCA_IPID MSR: only valid on SMCA systems */
 	__u64 ppin;	/* Protected Processor Inventory Number */
+	__u32 microcode;/* Microcode revision */
 };
 
 #define X86_VENDOR_INTEL	0