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2004-05-27 Josef Zlomek <zlomekj@suse.cz>
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PR middle-end/14084
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* emit-rtl.c (gen_rtx_REG_offset): Adjust the offset according
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to size of decl.
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--- gcc/emit-rtl.c 25 May 2004 12:04:15 -0000 1.391
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+++ gcc/emit-rtl.c 27 May 2004 04:28:12 -0000 1.392
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@@ -746,13 +746,96 @@ gen_reg_rtx (enum machine_mode mode)
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return val;
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}
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-/* Generate a register with same attributes as REG,
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- but offsetted by OFFSET. */
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+/* Generate a register with same attributes as REG, but offsetted by OFFSET.
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+ Do the big endian correction if needed. */
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rtx
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gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
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{
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rtx new = gen_rtx_REG (mode, regno);
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+ tree decl;
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+ HOST_WIDE_INT var_size;
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+
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+ /* PR middle-end/14084
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+ The problem appears when a variable is stored in a larger register
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+ and later it is used in the original mode or some mode in between
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+ or some part of variable is accessed.
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+
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+ On little endian machines there is no problem because
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+ the REG_OFFSET of the start of the variable is the same when
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+ accessed in any mode (it is 0).
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+
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+ However, this is not true on big endian machines.
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+ The offset of the start of the variable is different when accessed
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+ in different modes.
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+ When we are taking a part of the REG we have to change the OFFSET
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+ from offset WRT size of mode of REG to offset WRT size of variable.
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+
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+ If we would not do the big endian correction the resulting REG_OFFSET
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+ would be larger than the size of the DECL.
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+
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+ Examples of correction, for BYTES_BIG_ENDIAN WORDS_BIG_ENDIAN machine:
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+
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+ REG.mode MODE DECL size old offset new offset description
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+ DI SI 4 4 0 int32 in SImode
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+ DI SI 1 4 0 char in SImode
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+ DI QI 1 7 0 char in QImode
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+ DI QI 4 5 1 1st element in QImode
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+ of char[4]
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+ DI HI 4 6 2 1st element in HImode
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+ of int16[2]
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+
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+ If the size of DECL is equal or greater than the size of REG
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+ we can't do this correction because the register holds the
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+ whole variable or a part of the variable and thus the REG_OFFSET
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+ is already correct. */
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+
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+ decl = REG_EXPR (reg);
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+ if ((BYTES_BIG_ENDIAN || WORDS_BIG_ENDIAN)
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+ && decl != NULL
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+ && offset > 0
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+ && GET_MODE_SIZE (GET_MODE (reg)) > GET_MODE_SIZE (mode)
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+ && ((var_size = int_size_in_bytes (TREE_TYPE (decl))) > 0
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+ && var_size < GET_MODE_SIZE (GET_MODE (reg))))
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+ {
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+ int offset_le;
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+
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+ /* Convert machine endian to little endian WRT size of mode of REG. */
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+ if (WORDS_BIG_ENDIAN)
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+ offset_le = ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
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+ / UNITS_PER_WORD) * UNITS_PER_WORD;
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+ else
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+ offset_le = (offset / UNITS_PER_WORD) * UNITS_PER_WORD;
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+
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+ if (BYTES_BIG_ENDIAN)
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+ offset_le += ((GET_MODE_SIZE (GET_MODE (reg)) - 1 - offset)
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+ % UNITS_PER_WORD);
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+ else
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+ offset_le += offset % UNITS_PER_WORD;
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+
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+ if (offset_le >= var_size)
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+ {
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+ /* MODE is wider than the variable so the new reg will cover
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+ the whole variable so the resulting OFFSET should be 0. */
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+ offset = 0;
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+ }
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+ else
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+ {
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+ /* Convert little endian to machine endian WRT size of variable. */
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+ if (WORDS_BIG_ENDIAN)
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+ offset = ((var_size - 1 - offset_le)
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+ / UNITS_PER_WORD) * UNITS_PER_WORD;
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+ else
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+ offset = (offset_le / UNITS_PER_WORD) * UNITS_PER_WORD;
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+
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+ if (BYTES_BIG_ENDIAN)
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+ offset += ((var_size - 1 - offset_le)
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+ % UNITS_PER_WORD);
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+ else
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+ offset += offset_le % UNITS_PER_WORD;
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+ }
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+ }
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+
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REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
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REG_OFFSET (reg) + offset);
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return new;
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